MAX5938LEEE+【PDF 16/26 页】IC HOT-SWAP CTRLR -48V 16-QSOP

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normalized units, typically with a value of 1 at +25癈, it

is possible to multiply the curve by the drain voltage at

+25癈 and convert the curve to drain voltage. Now

compare this curve to that of the MAX5938 normalized

tempco of the circuit-breaker threshold to make a

determination of the tracking error in mV between the

power MOSFET [I

D,MOSFET

x R

DS(ON)

] and the

MAX5938 [I

CB_ADJ

(礎) x (2k& + R

CB_ADJ

)] over the

operating temperature range of the application.

If the tempco of the power MOSFET is greater than the

MAX5938s, then additional margin in setting the circuit-

breaker and short-circuit voltages will be required at

higher temperatures as compared to +25癈 (Figure 15).

When dissipation in the power MOSFET is expected to

lead to local temperature elevation relative to ambient

conditions, it becomes imperative that the MAX5938 be

located as close as possible to the power MOSFET. The

marginal effect of temperature differences on circuit-

breaker and short-circuit voltages can be estimated

from a comparative plot such as Figure 14.

Selecting a Resistor and Capacitor

for Step Monitor

When a positive V

step or ramp occurs, the V

increase results in a voltage rise at both STEP_MON

and V

OUT

relative to V

. When the voltage at

STEP_MON is above STEP

, the MAX5938 blocks

short-circuit and circuit-breaker faults. During this

STEP_MON high condition, if V

OUT

rises above V

, the

MAX5938 will immediately and very rapidly pull GATE to

. This turns off the power MOSFET to avoid inrush

current spiking. GATE is held low for 350祍. About 1ms

after the start of GATE pulldown, the MAX5938 begins to

ramp GATE up to turn on the MOSFET in a controlled

manner that results in ramping V

OUT

down to the new

supply level (see the GATE Cycles section in Appendix

A). This occurs with the least possible disturbance to

OUT

, although during the brief period that the MOSFET

is off, the voltage across the load droops slightly

depending on the load current and load storage capaci-

tance. PGOOD remains asserted throughout the V

step event.

The objective in selecting the resistor and capacitor for

the step monitor function is to ensure that the V

steps

of all anticipated slopes and magnitudes will be proper-

ly detected and blocked, which otherwise would result

in a circuit-breaker or short-circuit fault. The following is

a brief analysis for finding the resistor and capacitor.

For a more complete analysis, see Appendix B.

-48V Hot-Swap Controller with V

Step Immunity,

No R

SENSE

, and Overvoltage Protection

16 ______________________________________________________________________________________

Figure 14. MAX5938 Normalized Circuit Breaker

NORMALIZED MOSFET ON-RESISTANCE

vs. TEMPERATURE

TEMPERATURE (癈)

-15

0.6

0.8

1.0

1.2

1.4

1.6

0.4

-40

IRF1310NS

NORMALIZED R

IRFR3910

NORMALIZED R

MAX5938

NORMALIZED V

Figure 15. Circuit-Breaker Voltage Margin For High and Low Tempco Power MOSFETS

CIRCUIT-BREAKER

TRIP REGION

CIRCUIT-BREAKER

TRIP REGION

= +25癈

x R

DS(ON)

CB,MIN

x R

DS(ON)

HIGH TEMPCO

DS(ON)

LOW TEMPCO

TEMPERATURE

1/2 x I

CB_ADJ

x R

CB_ADJ

1/2 x I

CB_ADJ

x R

CB_ADJ

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